DKE German Commission for Electrical, Electronic & Information Technologies of DIN and VDE
DIN EN 62433-4
; VDE 0847-33-4:2017-05
EMC IC modelling - Part 4: Models of integrated circuits for RF immunity behavioural simulation - Conducted immunity modelling (ICIM-CI) (IEC 62433-4:2016); German version EN 62433-4:2016
EMV-IC-Modellierung - Teil 4: Modelle integrierter Schaltungen für die Simulation des Verhaltens der HF-Störfestigkeit - Modellierung der Störfestigkeit gegen leitungsgeführte Störungen (ICIM-CI) (IEC 62433-4:2016); Deutsche Fassung EN 62433-4:2016
Overview
Integrated circuits (IC) have more and more gates, the technical integration density is increasing and the supply voltages are becoming smaller. The reduction in the distance between signals on the chip, the smaller chip geometry and increase in unwanted currents in parasitic structures such as isolating capacitors result in more internal crosstalk. Thus the interference immunity of integrated circuits becomes increasingly important. As a result of this increased risk of decreasing IC immunity, models and simulation tools are required to optimize the immunity behavior of both the IC and the application. This document describes such models for the simulation of immunity behavior at the IC level. These models can be used to predict electromagnetic immunity at the application level. They are based on files that describe the PDN and the IB and contain data on electromagnetic disturbances that lead to a change in one or more signals under investigation. Users of the model should apply an error criterion to the signal to be analyzed depending on their requirements. This document describes the procedure for deriving a macro model that can be used to simulate the immunity to conducted disturbances of an integrated circuit. This model is commonly called Integrated Circuit Immunity Model - Conducted Immunity, ICIM-CI. It is intended to be used for predicting the levels of immunity to conducted RF disturbances applied on IC pins. In order to evaluate the immunity threshold of an electronic device, this macro-model will be inserted in an electrical circuit simulation tool. This macro-model can be used to model both analogue and digital ICs (input/output, digital core and supply). This macro-model does not take into account the non-linear effects of the IC. The additional benefit of the ICIM-CI is the focus on describing the behavior of the internal analog and digital functions when conducted interference is present. The model can also be used to predict interference immunity at PCB and system level using simulations. This makes it possible to predict the interference immunity of the IC component when designing integrated circuits. The ICIM-CI data can be decoded and arranged hierarchically using the XML format. The purpose of this exchange format, referred to as the Conducted Interference Description Language (CIML), is to provide simple and practically universal access to the ICIM-CI. Annex A contains preliminary specifications for the XML representation. This document consists of two main parts: - the first part contains the electrical description of the ICIM-CI elements; - the second part describes a universal data exchange format called CIML based on XML. This format allows ICIM-CI to be encoded in a more useable and generic form for ICIM-CI. The responsible committee is DKE/K 631 "Halbleiterbauelemente" ("Semiconductor devices") of the DKE (German Commission for Electrical, Electronic and Information Technologies) at DIN and VDE.
