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Project

Test methods for electrical materials, printed board and other interconnection structures and assemblies - Part 3-302: Computed tomography(CT) method for copper plating voids in metallized holes of PCB

Abstract

This standard specifies Computed tomography(CT) method for copper plating voids in metallized holes of PCB. This standard is applicable to metallized holes of PCB.

Begin

2023-08-31

Planned document number

DIN EN IEC 61189-3-302

Project number

02231810

Responsible national committee

DKE/K 682 - Aufbau- und Verbindungstechnik für elektronische Baugruppen  

Contact

Daniel Failer

Merianstraße 28
63069 Offenbach am Main

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