Project

IEC 60191-6-5 Ed.2: Mechanical standardization of semiconductor devices - Part 6-5: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Design guide for fine-pitch ball grid array (FBGA)

Contact

Dr.

Konstantin Petridis

Merianstr. 28
63069 Offenbach am Main

Tel.: +49 69 6308-443

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