Overview

This part of IEC 60749 establishes the procedure for testing, evaluating, and classifying devices and microcircuits according to their susceptibility (sensitivity) to damage or degradation by exposure to a defined field-induced charged device model (CDM) electrostatic discharge (ESD). All packaged semiconductor devices, thin film circuits, surface acoustic wave (SAW) devices, opto-electronic devices, hybrid integrated circuits (HICs), and multi-chip modules (MCMs) containing any of these devices are to be evaluated according to this document. To perform the tests, the devices are assembled into a package similar to that expected in the final application. This CDM document does not apply to socketed discharge model testers. This document describes the field-induced (FI) method. An alternative, the direct contact (DC) method, is described in Annex J. The purpose of this document is to establish a test method that will replicate CDM failures and provide reliable, repeatable CDM ESD test results from tester to tester, regardless of device type. Repeatable data will allow accurate classifications and comparisons of CDM ESD sensitivity levels. This CDM (Charged Device Model) document is not applicable to SDM (Socketed Discharge Model) test equipment. The earliest test models and standards for electrostatic discharge (ESD) simulate a charged object approaching a component and discharging through the component. The best-known example is IEC 60749-26, the Human Body Model (HBM). However, with the increasing use of automated systems for handling components, another potentially destructive discharge mechanism, the Charged Device Model (CDM), is becoming increasingly important. In CDM, a component itself becomes charged (for example, by sliding on a surface (charging through tribomechanical processes) or through electric field induction) and is rapidly discharged (by an ESD event) when it comes very close to a conductive object. A key feature of CDM is metal-to-metal discharge, which results in very rapid charge transfer through an arc flash. The CDM test method also simulates metal-to-metal discharges resulting from other similar scenarios, such as the discharge of charged metal objects onto components with a different potential. Accurate quantification and reproducibility of this rapid metal-to-metal discharge event is very difficult, if not impossible, due to the limitations of the measurement equipment and its influence on the discharge event. CDM discharge is typically completed in a few nanoseconds, and surge currents of several tens of amperes have been observed. The surge current into the device varies significantly depending on a large number of factors, including package type and parasitic elements. The typical failure mechanism observed in MOS devices for the CDM model is dielectric damage, although other types of damage have also been observed. The CDM charging voltage sensitivity of a given device depends on the package. For example, the same integrated circuit (IC) in a small-area package may be less susceptible to CDM damage at a given voltage than the same IC in a package of the same type with a larger area. It has been shown that susceptibility to CDM damage correlates better with surge current levels than with charging voltages.

Document: references other documents

Responsible national committee

DKE/K 631 - Halbleiterbauelemente